1. Field of the Invention
The present invention relates to semiconductor devices including an MOS (Metal Oxide Semiconductor) type FET (Field Effect Transistor) and manufacturing methods thereof. More particularly, the present invention relates to a semiconductor device including a power transistor structure (i.e.: IGBT (Insulated Gate Bipolar Transistor), MOSFET etc.) and a manufacturing method thereof.
2. Description of the Background Art
Bipolar type MOSFETs with an MOS structure formed in a trench, that is, IGBTs which have a power transistor structure are conventionally used. In the following, a conventional IGBT structure will be described with reference to FIG. 41.
As shown in FIG. 41, the conventional IGBT has impurity layers formed in a semiconductor substrate 200 as described below. A p+-type impurity diffusion layer 103 is formed as the lowest layer of semiconductor substrate 200. An n-type impurity diffusion layer 102 is formed on p+-type impurity diffusion layer 103. An n−-type impurity diffusion layer 101 is formed on n-type impurity diffusion layer 102. A p-type base layer 104 is formed on n−-type impurity diffusion layer 101.
Further, a trench 108 is formed from a main surface of semiconductor substrate 200 to a prescribed depth of n−-type impurity diffusion layer 101. In p-type base layer 104 in which trench 108 is formed, an n+-type emitter layer 106 is formed from the main surface of semiconductor substrate 200 to the sidewall of trench 108. A p+-type impurity diffusion layer 112 is formed to be adjacent to n+-type emitter layer 106. A refractory metal silicide layer 116 is formed on the surface of p+-type impurity diffusion layer 112.
From the surface of trench 108 to the upper surface of semiconductor substrate 200, a thermal oxide film 109 is formed by thermal oxidation. Thermal oxide film 109 functions as a gate insulation film of the IGBT. On the surface of thermal oxide film 109, a gate electrode 111 is formed to fill a recess remaining after formation of thermal oxide film 109 along the shape of trench 108. An oxide film 111a is formed on the surface of gate electrode 111.
A CVD (Chemical Vapor Deposition) oxide film 113 is formed on the surface of oxide film 111a. Silicate glass 114 is formed on CVD oxide film 113. A CVD oxide film 115 is formed at the top of silicate glass 114. A barrier metal film 117 is formed to cover the surfaces of CVD oxide films 113, 115, silicate glass 114, thermal oxide film 109, and refractory metal silicide layer 116. An aluminum interconnection layer 118 is formed on barrier metal film 117. It is noted that oxide film 111a is formed by oxidating the surface of gate electrode 111.
As described above, the conventional IGBT generally employs, as a gate insulation film, thermal oxide film 109 which is formed by thermal oxidation. For example, the techniques described in Japanese Patent Laying-Open Nos. 7-249770 and 8-172091 propose an ONO film structure insulation film, which is formed of an oxide film/a nitride film/an oxide film, as the gate insulation film of an MOS transistor, and a manufacturing method thereof.
Since the conventional MOS type FET structure as shown in FIG. 41 has several plane orientations represented by Miller indices (three planes of (100), (110), (111), for example) for the inner wall of a trench, however, the uniformity of the gate insulation film thickness of the trench inner wall is reduced. The gate insulation film is made thinner at the trench inner wall portion (the portion denoted by A in FIG. 41) and at the trench bottom (the portion denoted by B in FIG. 41) as shown in FIGS. 6 and 8, and at an edge of an oxide film which is formed by the LOCOS (LOCal Oxidation of Silicon) method as shown in FIG. 13, and therefore electric fields are locally concentrated. From the above described reason, the conventional MOS type FET has problems of degraded gate insulation film characteristics and lowered reliability.
Further, the surface of trench 108 suffers from crystal defects and stress which are caused such as by etching for forming trench 108 and by heating after formation of trench 108. Since thermal oxide film 109 which is formed by thermally oxidating the surface of trench 108 has a high defect density, interface states increase between thermal oxide film 109 and the surface of trench 108. As a result, the quality of thermal oxide film 109 as a gate insulation film may be lowered, and the transistor characteristics may be affected by the increased main junction leakage current and the lowered carrier life time of the semiconductor substrate.
When thermal oxide film 109 is to be formed, dopants in n+-type emitter diffusion layer 106 and p-type base layer 104 diffuse to thermal oxide film 109 because n+-type emitter diffusion layer 106 and p-type base layer 104 are formed near the sidewall of trench 108. Thus, the characteristics and reliability of thermal oxide film 109 as a gate insulation film are lowered. As a result, the MOS transistor characteristics are degraded.
In order to prevent the influences from the surface of trench 108 which is formed in semiconductor substrate 200, it is necessary to reduce the film thickness of silicon substrate 200 to be oxdated and the thermal oxidation time in the process of forming thermal oxide film 109 as a gate insulation film by thermal oxidation.